• For optimal RF performance, power tracks should be preferred over power planes.
• RF tracks must always be kept as short as possible.
• Use many ground vias, especially all over ground patches/islands

1. If the RF track runs on the outer metal layer:
   • Microstrip
   • Coplanar waveguides
2. If the RF track runs on an inner metal layer:
   • Embedded microstrip
   • Stripline

• Pay attention that the maximum insertion loss between the RF pad and the antenna must be kept under 0.5 dB
• Transmission lines EM fields extend beyond the RF track and couple to adjacent layers:

  For microstrip, the lateral gap running along the track must be at least twice the thickness between the track and its underlying ground plane.

  Both in microstrip and co-planar cases, adjacent metal areas must be present and be properly connected to the main ground plane, so as to terminate the fringing EM fields.

  
  

  

  
  

  Figure 14 provides examples of both transmission line implementations, specifically showing:

  1. The distance between the transmission line and the side-running grounded area on layer 1.
  2. The periodic via connections connecting the top metal layer to the reference GND layer of the transmission line.
• Avoid routing noisy signal tracks along the RF transmission lines to minimize cross-coupling into GC02S1-WW ’s RF ports.
• The component pads of the SMD parts used in the 3-component π-type matching circuit are effectively very short transmission lines. To minimise the RF insertion loss (s₁₁ , VSWR) caused by the width step, use tapered ends.

• The GC02S1-WW module itself
• The RF interface

1. Keep the tracks in the same quadrant than the interface they connect to.
2. Consider orientation to avoid track crossing when routing.
3. Keep the parts as close as possible to the GC02S1-WW module where possible.
4. Remember that a patch/on-board antenna radiates EM power that can interfere with the proper functioning of the parts located in its vicinity. Keep sensitive devices as far away as possible from the antenna.
5. Place as many ground vias as possible underneath the module in order to insure both excellent electrical grounding and thermal conduction (see section Thermal Considerations)
6. Add test points for critical signals such as UART2 and the FFF_FFH pad.
7. Reserve space for pull-ups (especially on UARTs CTS/RTS and SIM interface signals).

• Every track is a potential spurious antenna, especially if open-ended. Never route unneeded signals, and keep the tracks as short as possible
• If a track cannot be shortened, try and bury it.
• Manage a large clearance around RF tracks

• Avoid ‘via stubs’, use through-hole vias only when connecting tracks running on the top and bottom layers. In all other cases, use blind or micro vias.

  
  

  

  
  

1. Careful and sensible placement of digital signals is required to minimise cross-coupling between tracks.
2. Pay attention to ground currents during routing. Make sure that the grounding surrounding the tracks (from source to load) remains continuous, with no notches or gaps. Long and/or winding ground return currents can create EMI problems.
3. Ensure the tips listed in Section Controlled Impedance Tracks are taken into account for digital tracks requiring specific impedance. This is especially the case for USB data tracks (USB_D+ / USB_D-) which require 90 Ω differential impedance, with shielded ground planes in adjacent layers (shielded coplanar type tracks).
4. Keep digital tracks with no impedance needs thin to avoid a buildup of capacitance, while keeping them within manufacturing constraints.
5. If tracks are routed one atop the other, keep them orthogonal. Alternate layer tracks’ direction to minimise cross-coupling.
6. Important recommendations related to SIM connector placement can be found in the section SIM Recommendations .
7. Shield the clock signal vias.
8. The top and bottom layers should be filled with ground planes interrupted with the minimal number of tracks.
9. Bury as many tracks as possible, especially data (UART, etc) and clock tracks. If it is not possible to bury everything, leave only static signals (such as reset, etc) on the external layers.
10. A few signals can be further filtered, although this is not typically necessary. These signals are:
    • 1V8_LTE, with a π filter. The default BOM has a 0 Ω series resistor.
    • All SIM signals, with decoupling capacitors placed as close as possible to the SIM connector (not fitted by default).
    • The ANT_TUNE lines controlling the antenna switches, with RC filters. The default BOM has a series 0 Ω resistor.
11. The tracks between the SIM connector and the GC02S1-WW should be kept as short as possible, and away from the antenna.
12. Data and clock signals should be routed as far as possible from the antenna area.

1. Size the power supply tracks appropriately to provide a low resistance, low impedance source: the recommended width of the V_BAT signal must be greater than 1 mm. Pay attention to the number of vias used when routing tracks across multiple layers, as they add spurious series resistance. This is especially true for high current signals such as the power amplifier supply voltage.
2. The decoupling capacitors ground pad of each power supply signal must be connected to the ground return of the source.
3. Keep digital tracks well away from the power supply tracks.
4. The V_BAT track must be located as far away as possible from the RF section.
5. Sequans does not recommend power planes for this design.

1. Avoid burying these tracks as much as possible, because it increases RF losses w/r to top/bottom routing.
2. Keep tracks as short as possible to help reduce RF losses.
3. Try to mitigate impedance discontinuities. Use tapered ends to improve the matching with SMD pads.
4. Ensure the steps provided in Section Controlled Impedance Tracks are taken into account when setting the track width.

• Calculation of tracks width and spacing:
  Use simple RF design tools to compute the track’s width based on:

  1. The thickness of the dielectric substrate lying between the RF track and its associated ground plane.
  2. The spacing between the track and the adjacent ground plane (on the same layer).
  3. The dielectric constant of the PCB substrate material.

  Sometimes the required track width is impossible to manufacture. The design must then be altered until feasibility is guaranteed. Possible solutions:

  • Use of a thicker substrate.
  • Moving the reference ground plane further down.

  Please also note that impedance error increases as the track’s width narrows (this is due to mechanical tolerances becoming proportionally more noticeable).

• In general:

  1. Careful placement is required to keep RF tracks short and straight.
  2. Do not route RF tracks on buried layers.
  3. Ground planes beneath RF tracks should be continuous.
  4. The ground plane running along the RF tracks should be kept distant enough to not alter the track’s impedance.
• RF matching component footprints:

  Use tapering to minimise impedance mismatch at the end of tracks. If the parts are significantly wider than the transmission lines, the ground reference should be lowered.

1. RF ground planes should be as large and continuous as possible and not be cut into chunks. Check that strings of signal vias do not inadvertently create slots in ground.
2. Apply ground plane flooding on all layers.
3. Apply extensive via stitching. Make sure to scatter the vias evenly over the ground planes.
4. Use extra vias around sensitive areas such as RF tracks and noisy lines.
5. Stitch tight all along the board edges to create a Faraday’s cage.
6. Ground connection between the GC02S1-WW, the customer's application board and the power supply must be direct and as short as possible. Ground islands must be avoided.

• All Gxx pads must be tied to a large ground plane which serves as a thermal sink

• That ground area below the Gxx pads must be stitched with through vias, which conduct heat towards the opposite side of the board

• Besides, adding blind vias surrounding the Gxx pads area help spread the heat flow evenly amongst layers

• If a metal casing is used, it should ideally be in tight contact with the bottom ground layer so as to serve as a terminal heat sink

• If these measures cannot be implemented, or do not suffice, additional elements such as heat sinks, fans or thermal grease (GapPad™) can be used.

1. Top Layer
   • Reserved for RF signals. As few other signals as possible. The rest is a ground plane without islands.

   
   

   

   
   

2. Layer 2
   • Ground plane, no signal
   • Vias are evenly distributed across the surface

   
   

   

   
   

3. Layer 3
   • Power traces
   • The remaining space is flooded with ground with proper stitching and even via distribution

   
   

   

   
   

4. Layer 4
   • Signal layer
   • All signals are routed vertically on this plane, if possible
   • The remaining space is flooded with ground with proper stitching and even via distribution

   
   

   

   
   

5. Layer 5
   • Signal layer
   • The signals are routed horizontally, to minimise cross-coupling with layer 4
   • When this is not possible, precautions are taken to ensure that no layer 4 signal runs atop a layer 5 track
   • The remaining surface is flooded with ground with proper stitching and even via distribution

   
   

   

   
   

6. Bottom Layer
   • Minimal signal traces
   • Ground plane flooding with a lot of ground stitching (in green)
   • The red colour represents 5V0_USB, pink 3V3_AUX, orange 1V8_AUX
   • Vias are evenly distributed across the surface
   • Tight stitching around the board edges (Faraday’s cage)

   
   

   

   
   

• The DUT is connected to the computer using the UART 1.
• The DUT is also connected by one RF cable.

• 1 x ZN2PD2-50-S + power splitter if the signal analyser and the signal generator are two distinct equipments. R&S® CMW100 or CMW500 for instance allow the use of a single bidirectional RF port and obviate the need for a power splitter.
• 1 x RF cable to the MXA (if needed)
• 1 x RF cable to the MXG (if needed)
• 1 x RF cable to the DUT (in the shield box)

• Disconnect GC02S1-WW USB data pads (USB_D+ / USB_D-) from on-board host
• Connect them to the USB 2.0 connector of an external laptop/desktop
• GND shall be connected to customer board and laptop/desktop
• V_bus comes from either an External Power Supply unit of local GC02S1-WW host Supply

1. Any inconsistent and potentially hazardous manufacturing faults must be eliminated.
2. Clearance to proceed with further detailed calibration and measurements.
3. Evaluate the board’s performances.

• Checking for RF losses between the GC02S1-WW RF ports and the board’s RF output.
• A sanity check of the connections to the GC02S1-WW.
• Debugging, if necessary.

1. An external Host PC / Laptop for monitoring the UART 1 interface.
   Note:

   Detailed information will be provided in a future revision of this document.
2. LTE RF test equipment:
   1. A shielding box to avoid any RF interference caused by the environment.
   2. RF components such as: cables, splitters, 50 Ω dummy loads.
3. A power supply with ammeter.

AT+SMGT=0,0,0x400000,0,0,0x400000,0,0,0

AT+SMGT=0,0x40,0,0,0x40,0,0,0x40,0

• Unexpected AT command error:
  1. Make sure that you activated the Manufacturing mode with AT+CFUN=5 before trying to use the AT+SMGT command.
  2. Make sure that the version of the firmware used is the correct one.
• Unexpected GPIO behaviour:
  • Ensure that there exists no short or open circuit between the test point and the GC02S1-WW.

1. Send AT+CMEE=2 to activate error logs.
2. Send AT+CFUN=4 to start reading the SIM card.
3. Wait 10 seconds.
4. Send AT+CIMI. It will answer either:
   • +CME ERROR: SIM not inserted if no SIM card was detected
   • +CME ERROR: SIM busy. Wait for a few more seconds and check if the IMSI is returned. If not, please refer to section Troubleshooting.
   • <IMSI value> if the test completed successfully
5. Alternatively, the AT+SMST command can be used in manufacturing mode to test the SIM connectivity:

   AT+CFUN=5 
   OK 
   AT+SMST=1 
   +SMST: OK 
   OK

   If there is no communication with the SIM card, then the commands fails:

   AT+SMST=1 
   +SMST: NO SIM

• Unexpected AT command error:

  Make sure that the version of the firmware used is correct.

• Unexpected SIM behaviour:
  • Check all the connections between the SIM housing and ensure the board respects the recommendations detailed here.
  • Check for short or open circuits between the SIM housing and the GC02S1-WW.
  • Check ground continuity on all SIM housing ground pins and casing.

• Read product’s manufacturer, model and software version.

  ATI0 
  SEQUANS Communications
  GC02S1-WW
  UE9.0.5.0
  OK

• Read product’s software version and firmware release.

  ATI1 
  UE9.0.5.0
  LR9.0.5.1-63292 
  OK

• Read product’s serial number and IMEI.

  ATI2 
  SERIAL: AJAxxxxxxxxxxxxx
  IMEISV: 01674700xxxxxxxx
  OK

• Read manufacturer identification

  AT+CGMI 
  SEQUANS Communications 
  OK

• Read product’s IMEI

  AT+CGSN=1 
  +CGSN: "01674700xxxxxxxx" 
  OK

• Read product’s SVN (Software Version Number)

  AT+CGSN=3 
  +CGSN: "06" 
  OK

AT+CFUN=5 
OK

1. Modify the HW configuration of the module

2. Reboot the module with AT^RESET to apply the modifications

3. Create a restore point

• UART

• USB

• Wake pins

• Antenna tuner configuration

• SIM interface

1. Use AT+CFUN=5 to enter manufacturing mode
2. Use AT+SME="" to enter advanced manufacturing mode for the first time.
3. Set a password using AT+SMA="<password>" where <password> is the password to set.

AT+SQNHWCFG="uart1","enable","rtscts","921600","8","none","1","dcp"

AT+SQNHWCFG="wakeRTS1","disable"

• UART1

• UART2

• USB

• JTAG

1. UART1 and UART2 can be enabled again through UART0, so it is the host MCU responsibility to control access to the modem's UART0 .

2. Once JTAG is disabled, it can’t be enabled again (it uses a fuse mechanism).

AT+CFUN? 
+CFUN: 5 
OK 
AT+SQNFACTORYSAVE="OEM" 
OK

AT+SQNFACTORYRESET 
OK 
AT^RESET 
OK 
 
+SHUTDOWN 
 
+SYSSTART

• The GC02S1-WW supports software upgrade over all UART and USB interfaces.
• The GC02S1-WW supports differential software upgrade. Please contact Sequans support team to get differential software packages, depending on your needs. The SFU tool allows upgrade in two modes, "upgrade" and "raster". The "upgrade" mode takes a .dup file as input, whose format is described in the SFU Upgrade Tool User Manual document. It typically upgrades only the modem part (either full or differential upgrade). For instance:

sfu upgrade -z 2 -b 921600 COM45 GC02S1-WW_<latest_revision>.dup